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TMS320C6713B - Floating-Point Digital Signal Processor

General Description

11 device characteristics

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13 CPU (DSP core) description 14 mem

Key Features

  • Native Instructions for IEEE 754.
  • Single- and Double-Precision.
  • Byte-Addressable (8-, 16-, 32-Bit Data).
  • 8-Bit Overflow Protection.
  • Saturation; Bit-Field Extract, Set, Clear; Bit-Counting; Normalization D L1/L2 Memory Architecture.
  • 4K-Byte L1P Program Cache (Direct-Mapped).
  • 4K-Byte L1D Data Cache (2-Way).
  • 256K-Byte L2 Memory Total: 64K-Byte L2 Unified Cache/Mapped RAM, and 192K-Byte Additional L2 Mapped RAM D Device Configu.

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Full PDF Text Transcription for TMS320C6713B (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for TMS320C6713B. For precise diagrams, and layout, please refer to the original PDF.

TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR D Highest-Performance Floating-Point Digital Signal Processor (DSP): TMS320C6713B − Eight 32-Bit Instructions/Cycle −...

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gnal Processor (DSP): TMS320C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word − 300-, 225-, 200-MHz (GDP and ZDP), and 225-, 200-, 167-MHz (PYP) Clock Rates − 3.3-, 4.

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