Description
11 device characteristics
.
13 CPU (DSP core) description
14 mem
Features
- Native Instructions for IEEE 754.
- Single- and Double-Precision.
- Byte-Addressable (8-, 16-, 32-Bit Data).
- 8-Bit Overflow Protection.
- Saturation; Bit-Field Extract, Set, Clear;
Bit-Counting; Normalization
D L1/L2 Memory Architecture.
- 4K-Byte L1P Program Cache (Direct-Mapped).
- 4K-Byte L1D Data Cache (2-Way).
- 256K-Byte L2 Memory Total: 64K-Byte
L2 Unified Cache/Mapped RAM, and 192K-Byte Additional L2 Mapped RAM
D Device Configu.
TMS320C6713B Datasheet
