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TPIC1301 - 3-Half H-Bridge Gate-Protected Power DMOS Array

General Description

transistors configured as three half H-bridges.

Key Features

  • integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition OUTPUT3 11 OUTPUT3 12 14 DRAIN3 13 GATE3 occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the human-body model of a 100-pF capacitor in series with a 1.5-kΩ resistor. The TPIC1301 is offered in a 24-pin wide-body surface-mount (DW) package and is characterized for operation over the case temperature range of.
  • 40°C to 125°C. s.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ą TPIC1301 3ĆHALF HĆBRIDGE GATEĆPROTECTED POWER DMOS ARRAY SLIS037 − NOVEMBER 1994 • Low rDS(on) . . . 0.23 Ω Typ • High Voltage Output . . . 60 V DW PACKAGE (TOP VIEW) • Extended ESD Capability . . . 4000 V OUTPUT1 1 24 OUTPUT1 • Pulsed Current . . . 11.25 A Per Channel • Fast Commutation Speed GATE4 SOURCE4 SOURCE4 2 3 4 23 GATE1 22 DRAIN1 21 DRAIN1 description GND 5 GND 6 20 DRAIN2 19 DRAIN2 The TPIC1301 is a monolithic gate-protected GATE5 7 18 OUTPUT2 power DMOS array that consists of six electrically SOURCE6 8 17 OUTPUT2 isolated N-channel enhancement-mode DMOS SOURCE6 9 16 GATE2 transistors configured as three half H-bridges.