TPIC5423L Datasheet | Texas Instruments

description The TPIC5423L is a monolithic gate-protected logic-level power DMOS array that consists of four electrically isolated independent N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes (ZCXa and ZCXb) to prevent gate damage in the event that an overstress condition occurs. These zener diodes also provide up to 4000 V of ESD protection when tested using the humanbody model of a 100-p F capacitor in series with a 1.5-kΩ resistor. DW PACKAGE (TOP VIEW) DRAIN1 DRAIN1 GATE1 GND SOURCE1 SOURCE1 SOURCE2 SOURCE2 GND GATE2 DRAIN2 DRAIN2 1 2 3 4 5 6 7 8 9 10 11 12 24 DRAIN3 23 DRAIN3 22 GATE3 21 GND 20 SOURCE3 19 SOURCE3 18 SOURCE4 17 SOURCE4 16 GND 15 GATE4 14 DRAIN4 13 DRAIN4 The TPIC5423L is offered in a 24-pin wide-body surface-mount (DW) package and is characterized for operation over the case temperature of - 40°C to 125°C. schematic 1, 2 DRAIN1 GATE1 3 ZC1b 5, 6 ZC1a SOURCE1 DRAIN2 11, 12 Q1 D1 D3 Z1 Z3 Q3 ZC3b ZC3a 10 GATE2 Q2 ZC2b Z2 D2 D4 Z4 7, 8 SOURCE2 ZC2a 4, 9, 16, 21 GND NOTE A: For correct operation, no terminal may be taken below GND. Q4 ZC4b ZC4a 23, 24 DRAIN3 22 GATE3 19, 20 SOURCE3 13, 14 DRAIN4 15 GATE4 17, 18 SOURCE4 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1994, Texas Instruments Incorporated 2- 1 TPIC5423L 4-CHANNEL INDEPENDENT GATE-PROTECTED LOGIC-LEVEL POWER DMOS...