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ą TPIC5424L HĆBRIDGE LOGICĆLEVEL POWER DMOS ARRAY ą
SLIS026A − JUNE 1994 − REVISED NOVEMBER 1994
• Low rDS(on) . . . 0.4 Ω Typ • High-Voltage Output . . . 60 V • Pulsed Current . . . 3 A Per Channel • Fast Commutation Speed • Direct Logic-Level Interface
description
The TPIC5424L is a monolithic logic-level power DMOS array that consists of four electrically isolated N-channel enhancement-mode DMOS transistors, two of which are configured with a common source.
DW PACKAGE (TOP VIEW)
GND SOURCE4/GND
GATE4 NC
DRAIN4 SOURCE3
DRAIN3 GATE3
NC NC
1 2 3 4 5 6 7 8 9 10
20 SOURCE2/GND 19 GATE2 18 NC 17 NC 16 DRAIN2 15 SOURCE1 14 DRAIN1 13 GATE1 12 NC 11 NC
The TPIC5424L is offered in a 16-pin thermally enhanced dual-in-line (NE) package and a 20-pin wide-body surface-mount (DW) package.