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TS3DDR32611 - 1A Peak Sink/Source PCDDR3 Termination Regulator

General Description

The TS3DDR32611 is a sink/source double data rate type III (PCDDR3) termination regulator with a 1% accuracy buffered reference output.

It has built-in termination SPST switches that can be disconnected when the memory system undergoes lower speed operation without the need of voltage termination.

Key Features

  • 1.
  • VDD Range.
  • 3.0V to 3.6V.
  • RON 1.75Ω typical.
  • Channel Count.
  • 26.
  • VDDQ.
  • Input Voltage 1.2V to 3.5V.
  • VTT.
  • VDDQ/2 typical with 1A sink/source capability.
  • VREF.
  • VDDQ/2±1% × VDDQ.
  • Switch Time.
  • (TON/OFF) 100ns Max.
  • IDD Supply Current.
  • High Speed Mode (IDD,HS) 220 µA Max.
  • Low Speed Mode (IDD,LS) 220 µA Max.
  • Power Down Mode (IDD,PD) 5 µA Max.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com TS3DDR32611 SCDS347A – AUGUST 2013 – REVISED SEPTEMBER 2013 1A Peak Sink/Source PCDDR3 Termination Regulator with Integrated Isolation Switch and Low Power Mode Operation Check for Samples: TS3DDR32611 FEATURES 1 • VDD Range – 3.0V to 3.6V • RON 1.75Ω typical • Channel Count – 26 • VDDQ – Input Voltage 1.2V to 3.5V • VTT – VDDQ/2 typical with 1A sink/source capability • VREF – VDDQ/2±1% × VDDQ • Switch Time – (TON/OFF) 100ns Max • IDD Supply Current – High Speed Mode (IDD,HS) 220 µA Max – Low Speed Mode (IDD,LS) 220 µA Max – Power Down Mode (IDD,PD) 5 µA Max • Special Features – 1.8-V Compatible Control Inputs (VTT_EN, ODT_EN) – High current Sinking/Sourcing Capability: 1A Max • 48-Ball ZQC Package (4mm x 4mm, 0.