Download TS3DDR4000 Datasheet PDF
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TS3DDR4000 Description

The A port can be switched to the B or C port for all bits simultaneously. Designed for operation in DDR2, DDR3 and DDR4 memory bus systems, the TS3DDR4000 uses a proprietary architecture that delivers high bandwidth (single-ended 3dB bandwidth at 5.6 GHz), low insertion loss at low frequency, and very low propagation delay. The TS3DDR4000 is 1.8 V logic patible, and all switches are bi-directional for added design...

TS3DDR4000 Key Features

  • 1 Wide VDD Range: 2.375 V
  • High Bandwidth: 5.6 GHz Typical (single-ended)
  • Low Switch On-Resistance (RON): 8 Ω Typical
  • Low Bit-to-Bit Skew: 3ps Typical; 6ps Max across
  • Low Crosstalk: -34 dB Typical at 1067 MHz
  • Low Operating Current: 40 µA Typical
  • Low-Power Mode with Low Current Consumption
  • Supports POD_12, SSTL_12, SSTL_15 and
  • ESD Performance
  • 3-kV Human Body Model (A114B, Class II)