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74AHCT02PW Datasheet Quad 2-input Nor Gate

Manufacturer: Nexperia

Overview: 74AHC02; 74AHCT02 Quad 2-input NOR gate Rev. 5 — 11 May 2020 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74AHC02;

74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

Key Features

  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • For 74AHC02: CMOS level.
  • For 74AHCT02: TTL level.
  • ESD protection:.
  • HBM EIA/JESD22-A114E exceeds 2000 V.
  • MM EIA/JESD22-A115-A exceeds 200 V.
  • CDM EIA/JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3.

Similar Datasheet

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