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74AUP1G386 Datasheet

Manufacturer: Nexperia
74AUP1G386 datasheet preview

Datasheet Details

Part number 74AUP1G386
Datasheet 74AUP1G386-nexperia.pdf
File Size 250.57 KB
Manufacturer Nexperia
Description Low-power 3-input EXCLUSIVE-OR gate
74AUP1G386 page 2 74AUP1G386 page 3

74AUP1G386 Overview

The 74AUP1G386 is a single 3-input EXCLUSIVE-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6.

74AUP1G386 Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Overvoltage tolerant inputs to 3.6 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • plies with JEDEC standards
  • JESD8-12 (0.8 V to 1.3 V)

74AUP1G386 Applications

  • Wide supply voltage range from 0.8 V to 3.6 V

74AUP1G386 from other manufacturers

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Brand Logo Part Number Description Other Manufacturers
NXP Semiconductors Logo 74AUP1G386 Low-power 3-input EXCLUSIVE-OR gate NXP Semiconductors
Nexperia logo - Manufacturer

More Datasheets from Nexperia

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Part Number Description
74AUP1G38 Low-power 2-input NAND gate
74AUP1G32 Low-power 2-input OR-gate
74AUP1G32-Q100 Low-power 2-input OR-gate
74AUP1G3208 Low-power 3-input OR-AND gate
74AUP1G332 Low-power 3-input OR-gate
74AUP1G34 Low-power buffer
74AUP1G34-Q100 Low-power buffer
74AUP1G373 Low-power D-type transparent latch
74AUP1G373-Q100 Low-power D-type transparent latch
74AUP1G374 Low-power D-type flip-flop

74AUP1G386 Distributor

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