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74AUP1G38 - Low-power 2-input NAND gate

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nexperia

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74AUP1G38 Low-power 2-input NAND gate by nexperia - Datasheet Preview — Datasheet preview – 74AUP1G38

Datasheet Details

Part number	74AUP1G38
Manufacturer	nexperia
File Size	265.12 KB
Description	Low-power 2-input NAND gate
Datasheet	74AUP1G38 Datasheet
Additional preview pages of the 74AUP1G38 datasheet.

Product details

Description

The 74AUP1G38 is a single 2-input NAND gate with open-drain output.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Features

Wide supply voltage range from 0.8 V to 3.6 V.
CMOS low power dissipation.
High noise immunity.
Complies with JEDEC standards:.
JESD8-12 (0.8 V to 1.3 V).
JESD8-11 (0.9 V to 1.65 V).
JESD8-7 (1.65 V to 1.95 V).
JESD8-5 (2.3 V to 2.7 V).
JESD8C (2.7 V to 3.6 V).
ESD protection:.
HBM JESD22-A114F Class 3A exceeds 5000 V.
MM JESD22-A115-A exceeds 200 V.
CDM JESD22-C101E exceeds 1000.

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Published: Jul 23, 2019 |