Datasheet Details
| Part number | 74AUP1G32-Q100 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 231.08 KB |
| Description | Low-power 2-input OR-gate |
| Datasheet | 74AUP1G32-Q100-nexperia.pdf |
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Overview: 74AUP1G32-Q100 Low-power 2-input OR-gate Rev. 5 — 17 January 2022 Product data sheet 1.
| Part number | 74AUP1G32-Q100 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 231.08 KB |
| Description | Low-power 2-input OR-gate |
| Datasheet | 74AUP1G32-Q100-nexperia.pdf |
|
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|
The 74AUP1G32-Q100 provides the single 2-input OR function.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
| Part Number | Description |
|---|---|
| 74AUP1G32 | Low-power 2-input OR-gate |
| 74AUP1G3208 | Low-power 3-input OR-AND gate |
| 74AUP1G332 | Low-power 3-input OR-gate |
| 74AUP1G34 | Low-power buffer |
| 74AUP1G34-Q100 | Low-power buffer |
| 74AUP1G373 | Low-power D-type transparent latch |
| 74AUP1G373-Q100 | Low-power D-type transparent latch |
| 74AUP1G374 | Low-power D-type flip-flop |
| 74AUP1G374-Q100 | Low-power D-type flip-flop |
| 74AUP1G38 | Low-power 2-input NAND gate |