74AUP1G32
Description
The 74AUP1G32 is a single 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Key Features
- Wide supply voltage range from 0.8 V to 3.6 V
- CMOS low power dissipation
- High noise immunity
- Overvoltage tolerant inputs to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial power-down mode operation
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Low static power consumption; ICC = 0.9 µA (maximum)
- complies with JEDEC standards
- JESD8-B (2.7 V to 3.6 V)
