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74HCS16507-Q100 - 8-bit parallel-load shift register

General Description

The 74HCS16507-Q100 is an 8-bit serial or parallel-in/serial-out shift register with open-drain outputs.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 2.0 V to 6.0 V.
  • Schmitt-trigger inputs.
  • Low power consumption.
  • Typical supply current (ICC) of 100 nA.
  • Typical input leakage current (II) of ±10 nA.
  • ±7.8 mA output drive at 6 V.
  • 8-bit serial input and 8-bit serial or parallel output.
  • Shift regist.

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74HCS16507-Q100 8-bit parallel-load shift register with Schmitt-trigger inputs and open-drain outputs Rev. 1 — 5 June 2025 Product data sheet 1. General description The 74HCS16507-Q100 is an 8-bit serial or parallel-in/serial-out shift register with open-drain outputs. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D0 to D7 is loaded into the shift register asynchronously. When PL is HIGH data enters the register serially at DS. When the clock enable input (CE) is LOW data is shifted on the LOW-toHIGH transitions of the CP input. A HIGH on CE will disable the CP input. Inputs include clamp diodes.