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74HCT368 - Hex buffer/line driver

Download the 74HCT368 datasheet PDF. This datasheet also covers the 74HC368 variant, as both devices belong to the same hex buffer/line driver family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC368; 74HCT368 is a hex inverting buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE).

A HIGH on nOE causes the outputs to assume a high impedance OFF-state.

Key Features

  • Wide supply voltage range from 2.0 to 6.0 V.
  • Input levels:.
  • For 74HC368: CMOS level.
  • For 74HCT368: TTL level.
  • CMOS low power dissipation.
  • High noise immunity.
  • Inverting 3-state outputs.
  • Complies with JEDEC standards.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC368-nexperia.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 74HCT368
Manufacturer Nexperia
File Size 239.34 KB
Description Hex buffer/line driver
Datasheet download datasheet 74HCT368 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC368; 74HCT368 Hex buffer/line driver; 3-state; inverting Rev. 4 — 5 August 2021 Product data sheet 1. General description The 74HC368; 74HCT368 is a hex inverting buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 to 6.0 V • Input levels: • For 74HC368: CMOS level • For 74HCT368: TTL level • CMOS low power dissipation • High noise immunity • Inverting 3-state outputs • Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.