74HCT390 Datasheet | Nexperia

description The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (n MR) and can be used in a BCD decade or bi-quinary configuration. If master reset inputs (1MR and 2MR) are used to simultaneously clear all 8 bits of the counter, a number of counting configurations are possible within one package. The separate clocks (n CP0 and n CP1) of each section allow ripple counter or frequency division applications of divide-by-2, 4, 5, 10, 20, 25, 50 or 100. Each section is triggered by the HIGH-to-LOW transition of the clock inputs (n CP0 and n CP1). For BCD decade operation, the n Q0 output is connected to the n CP1 input of the divide-by-5 section. For bi-quinary decade operation, the n Q3 output is connected to the n CP0 input and n Q0 bees the decade output. A HIGH on the n MR input overrides the clocks and sets the four outputs LOW. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits - Input levels: - For 74HC390: CMOS level - For 74HCT390: TTL level - Two BCD decade or bi-quinary counters - One device can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100 - Two master reset inputs to clear each decade counter individually - Supply voltage range from 4.5 V to 5.5 V - High noise immunity - Latch-up performance exceeds 100 m A per JESD 78 Class II Level B - plies with JEDEC standard JESD7A (4.5 V to 5.5 V) - ESD protection: - HBM JESD22-A114F exceeds 2000 V - MM JESD22-A115-A exceeds 200 V - Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74HC390D 74HCT390D -40 °C to +125...