74LVC1G175 - Single D-type flip-flop

Product Overview

nexperia

Datasheet Details

Part number	74LVC1G175
Manufacturer	nexperia
File Size	263.35 KB
Description	Single D-type flip-flop
Datasheet	74LVC1G175 Datasheet
Additional preview pages of the 74LVC1G175 datasheet.

Product details

Description

The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.

The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input.

Features

Wide supply voltage range from 1.65 V to 5.5 V.
High noise immunity.
Overvoltage tolerant inputs to 5.5 V.
±24 mA output drive (VCC = 3.0 V).
CMOS low power dissipation.
Direct interface with TTL levels.
IOFF circuitry provides partial Power-down mode operation.
Latch-up performance exceeds 250 mA.
Complies with JEDEC standard:.
JESD8-7 (1.65 V to 1.95 V).
JESD8-5 (2.3 V to 2.7 V).
JESD8C.

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Published: Jul 24, 2019 |