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74LVC574A - Octal D-type flip-flop

General Description

The 74LVC574A is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs.

Key Features

  • Wide supply voltage range from 1.2 to 3.6 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Overvoltage tolerant inputs to 5.5 V.
  • High-impedance when VCC = 0 V.
  • 8-bit positive edge-triggered register.
  • Independent register and 3-state buffer operation.
  • Flow-through pin-out architecture.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standard:.
  • JESD8-7A.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC574A Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state Rev. 6 — 30 August 2021 Product data sheet 1. General description The 74LVC574A is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.