Description
configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device.
Features
- On-resistance RDS(on): 27 mW (Typ).
- Operating Temperature: 175 °C (Max).
- Excellent Reverse Recovery: Qrr = 425 nC.
- Low Body Diode VFSD: 1.3 V.
- Low Gate Charge: QG = 43 nC.
- Threshold Voltage VG(th): 5 V (Typ) Allowing 0 to 15 V Drive.
- Package Creepage and Clearance Distance > 6.1 mm.
- Kelvin Source Pin for Optimized Switching Performance.
- ESD Protected, HBM Class 2.
- This Device is Pb-Free, Halogen Free and i.
UF3SC065030B7S Datasheet
