74HC10 Datasheet and Specifications PDF

The 74HC10 is a Triple 3-input NAND gate.

Key Specifications

PackageSOP
Operating Voltage5 V
Max Voltage (typical range)6 V
Min Voltage (typical range)2 V
Length8.65 mm
Width3.9 mm
Max Operating Temp125 °C
Min Operating Temp-40 °C
Part Number74HC10 Datasheet
ManufacturerPhilips Semiconductors
Overview 74HC/HCT10 The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 .
* Output capability: standard
* ICC category: SSI GENERAL DESCRIPTION 74HC/HCT10 The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND funct.
Part Number74HC10 Datasheet
DescriptionTriple 3-Input NAND Gates
ManufacturerTexas Instruments
Overview This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) CD74.
* Buffered inputs
* Wide operating voltage range: 2 V to 6 V
* Wide operating temperature range: -55°C to +125°C
* Supports fanout up to 10 LSTTL loads
* Significant power reduction compared to LSTTL logic ICs 2 Applications
* Alarm / tamper detect circuit
* S-R latch 1A 1 1B 2 2A 3 2B 4 2C.
Part Number74HC10 Datasheet
DescriptionTriple 3-input NAND gate
ManufacturerNexperia
Overview The 74HC10; 74HCT10 is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and bene. and benefits
* Complies with JEDEC standard JESD7A
* Input levels:
* For74HC10: CMOS level
* For 74HCT10: TTL level
* Complies with JEDEC standard no. 7A
* ESD protection:
* HBM JESD22-A114F exceeds 2000 V
* MM JESD22-A115-A exceeds 200 V
* Multiple package options
* Specified from -40 °C to +85 °C .

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