74HC193 Datasheet and Specifications PDF

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH .

and benefits
* Wide supply voltage range from 2.0 to 6.0 V
* CMOS low power dissipation
* High noise immunity
* Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
* Input levels:
* For 74HC193: CMOS level
* For 74HCT193: TTL level
* Synchronous reversible 4-bit binary counting
* Asynch.

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH .

and benefits
* Input levels:
* For 74HC193: CMOS level
* For 74HCT193: TTL level
* Synchronous reversible 4-bit binary counting
* Asynchronous parallel load
* Asynchronous reset
* Expandable without external logic
* Complies with JEDEC standard no. 7A
* ESD protection:
* HBM JESD22-A114F exceeds 200.

ordering information NC − No internal connection The ’HC193 devices are 4-bit synchronous, reversible, up/down binary counters. Synchronous operation is provided by having all flip-flops clocked sim.

allows the counters to be used as modulo-N dividers simply by modifying the count length with the preset inputs. A clear (CLR) input has been provided that forces all outputs to the low level when a high level is applied. The clear function is independent of the count and LOAD inputs. These counters.