| Part Number | 74HCT112 |
|---|---|
| Manufacturer | Nexperia |
| Overview | The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. . individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the . |
74HCT112 Datasheet
The 74HCT112 is a Dual JK flip-flop.
| Part Number | 74HCT112 |
|---|---|
| Description | Dual JK flip-flop |
| Manufacturer | Philips Semiconductors |
| Overview |
The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT112 are dual ne.
* Asynchronous set and reset * Output capability: standard * ICC category: flip-flops GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT112 are d. |