| Part Number | 74LVC2G00 Datasheet |
|---|---|
| Manufacturer | Diodes Incorporated |
| Overview |
Pin Assignments
The 74LVC2G00 is a dual, two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for p.
* Wide Supply Voltage Range from 1.65 to 5.5V * ± 24mA Output Drive at 3.3V * CMOS Low Power Consumption * IOFF Supports Partial-Power-Down Mode Operation * Inputs accept up to 5.5V * Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall times. The hysteresis. |
74LVC2G00 Datasheet and Specifications PDF
The 74LVC2G00 is a DUAL 2-INPUT NAND GATE.
| Part Number | 74LVC2G00 Datasheet |
|---|---|
| Description | Dual 2-input NAND gate |
| Manufacturer | NXP Semiconductors |
| Overview |
The 74LVC2G00 provides a 2-input NAND gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environ.
and benefits
* Wide supply voltage range from 1.65 V to 5.5 V * 5 V tolerant outputs for interfacing with 5 V logic * High noise immunity * 24 mA output drive (VCC = 3.0 V) * CMOS low power consumption * Complies with JEDEC standard: * JESD8-7 (1.65 V to 1.95 V) * JESD8-5 (2.3 V to 2.7 V) * JESD8-B. |
| Part Number | 74LVC2G00 Datasheet |
|---|---|
| Description | Dual 2-input NAND gate |
| Manufacturer | Nexperia |
| Overview |
The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmi.
and benefits
* Wide supply voltage range from 1.65 V to 5.5 V * 5 V tolerant outputs for interfacing with 5 V logic * High noise immunity * ±24 mA output drive (VCC = 3.0 V) * CMOS low power dissipation * IOFF circuitry provides partial Power-down mode operation * Complies with JEDEC standard: * JES. |