74LVC2G00 Description
Pin Assignments The 74LVC2G00 is a dual, two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF.
74LVC2G00 Key Features
- Wide Supply Voltage Range from 1.65 to 5.5V
- ± 24mA Output Drive at 3.3V
- CMOS Low Power Consumption
- IOFF Supports Partial-Power-Down Mode Operation
- Inputs accept up to 5.5V
- Schmitt Trigger Action at all inputs makes the circuit tolerant
- ESD Protection Exceeds JESD 22
- 2000-V Human Body Model (A114)
- Exceeds 1000-V Charged Device Model (C101)
- Latch-Up Exceeds 100mA per JESD 78, Class I