74LVC2G07 Overview
74LVC2G07 The 74LVC2G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device superior to most advanced CMOS patible TTL families. Input can be driven from either 3.3 V or 5 V devices.
74LVC2G07 Key Features
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant input/output for interfacing with 5 V logic
- High noise immunity
- plies with JEDEC standard
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- 24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
