IDT23S08 Datasheet
IDT23S08 Datasheet (IDT)
IDT
IDT23S08 • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable f.
DESCRIPTION:
IDT23S08
* Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency
* Distributes one clock input to two banks of four outputs
* Separate output enable for each output bank
* External feedback (FBK) pin is used to synchronize the outputs to.
IDT23S08 Datasheet (Renesas)
Renesas
The IDT23S08 is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning th.
* Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency
* Distributes one clock input to two banks of four outputs
* Separate output enable for each output bank
* External feedback (FBK) pin is used to synchronize the outputs
to the clock input
* Outpu.