64k-Bit Datasheet | Specifications & PDF Download

MITSUBISHI LSls M5K4164ANP-12, -15 65 536-BIT (65 536-WORD BY I-BIT) DYNAMIC RAM DESCRIPTION This is a family of 65 536-word by l-bit dynamic RAMs,

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M27C512 512 Kbit (64K x8) UV EPROM and OTP EPROM Features ■ 5V ± 10% supply voltage in read operation ■ Access time: 45 ns ■ Low power “CMOS” consump

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INTEGRATED CIRCUITS 89C536/89C538 80C51 8-bit microcontroller family 16K/64K/512 FLASH Preliminary specification Supersedes data of 1997 Dec 02 IC20

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M7040N 64K x 72-bit Entry NETWORK PACKET SEARCH ENGINE PRELIMINARY DATA FEATURES SUMMARY s 64K DATA ENTRIES IN 72-BIT MODE s Figure 1. 388-ball PBGA

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MITSUBISHI LSls MSL2764K, -2 65536-BIT (8192-WORD BY 8-BIT) ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M5L2764 K is a hi

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FUJITSU SEMICONDUCTOR DATA SHEET Memory FRAM 64 K (8 K  8) Bit I2C MB85RC64V DS501-00013-5v0-E ■ DESCRIPTION The MB85RC64V is an FRAM (Ferroelectri

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® LY616416 Rev. 1.1 5V 64K X 16 BIT HIGH SPEED CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Description Initial Issue Revised Test Conditi

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FUJITSU MICROELECTRONICS DATA SHEET DS07–12627–1E 8-bit Microcontrollers CMOS F2MC-8FX MB95260H/270H/280H Series MB95F262H/F262K/F263H/F263K/F264H/F

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INTEGRATED CIRCUITS 8XC54/58 8XC51FA/FB/FC/80C51FA 8XC51RA+/RB+/RC+/RD+/80C51RA + 80C51 8-bit microcontroller family 8K–64K/256–1K OTP/ROM/ROMless, l

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MITSUBISHI LSls MSK4164ANP-20 6SS36-BIT (6SS36-WORD BY I-BIT) DYNAMIC RAM DESCRIPTION This is a family of 65536-word by l-bit dynamic RAMs, fabricat

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PRELIMINARY MX10EXA XA 16-bit Microcontroller Family 64K Flash/2K RAM, Watchdog, 2UARTs FEATURE • 4.5V to 5.5V • 64K bytes of on-chip Flash program m

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Features • Single Voltage Operation • • • • • • • • • – 5V Read – 5V Reprogramming Fast Read Access Time - 45 ns Internal Program Control and Timer 8K

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AT29C1024 Features • • • • • • • • • • • • Fast Read Access Time - 70 ns 5-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram (

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FUJITSU SEMICONDUCTOR DATA SHEET Memory FRAM DS501-00012-5v0-E 64 K (8 K × 8) Bit SPI MB85RS64 ■ DESCRIPTION MB85RS64 is a FRAM (Ferroelectric Rand

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Features • High-performance, Low-power Atmel AVR® 8-bit Microcontroller • Advanced RISC Architecture – 130 Powerful Instructions – Most Single Clock C

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FUJITSU SEMICONDUCTOR DATA SHEET DS05–13109–3E Memory FRAM 64 K (8 K × 8) Bit I2C MB85RC64 ■ DESCRIPTION The MB85RC64 is a FRAM (Ferroelectric Ran

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MR45V064B 64k(8,192-Word × 8-Bit) FeRAM (Ferroelectric Random Access Memory) SPI FEDR45V064B-01 Issue Date: Jan 08, 2016 GENERAL DESCRIPTION The MR4

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MR44V064B 64k(8,192-Word × 8-Bit) FeRAM (Ferroelectric Random Access Memory) I2C FEDR44V064B-01 Issue Date: Jan. 08, 2016 GENERAL DESCRIPTION The MR

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MITSUBISHI LSls MsK4164AND-12, -15 65 536-BIT (65 536-WORD BY i-BIT) DYNAMIC RAM DESCRIPTION This is a family of 65 536-word by 1-bit dynamic RAMs,

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