74AUP2G00 Datasheet | Specifications & PDF Download

74AUP2G00 Low-power dual 2-input NAND gate Rev. 8 — 5 February 2013 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NA

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NEW PRODUCT 74AUP2G00 DUAL NAND GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power an

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74AUP2G00-Q100 Low-power dual 2-input NAND gate Rev. 2 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00-Q100 provides dual 2-in

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74AUP2G00 Low-power dual 2-input NAND gate Rev. 11 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND

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SN74AUP2G00-Q1 www.ti.com LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE Check for Samples: SN74AUP2G00-Q1 SCES812 – JUNE 2010 FEATURES 1 • Qualified f

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SN74AUP2G00 www.ti.com SCES752C – SEPTEMBER 2009 – REVISED MAY 2010 LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE Check for Samples: SN74AUP2G00 FEATUR

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