74AUP2G00 Datasheet | Diodes Incorporated

NEW PRODUCT DUAL NAND GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G00 is a dual two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function: Y = A - B or Y = A + B (Top View) X2-DFN1210-8 Features - Advanced Ultra Low Power (AUP) CMOS - Supply Voltage...