74AUP2G00 Datasheet Dual Nand Gate

Manufacturer: Diodes Incorporated

Overview: NEW PRODUCT 74AUP2G00 DUAL NAND GATE.

Datasheet Details

Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G00 is a dual two input NAND gate.

Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V.

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8V to 3.6V.
±4mA Output Drive at 3.0V.
Low Static Power Consumption ICC < 0.9µA.
Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V).
Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250 mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.
ESD Protection Exceed.

Part Number	Description	Manufacturer
74AUP2G00	Low-power dual 2-input NAND gate	NXP
74AUP2G00	Low-power dual 2-input NAND gate	nexperia
74AUP2G00-Q100	Low-power dual 2-input NAND gate	nexperia

Part Number	Description
74AUP2G02	DUAL NOR GATE
74AUP2G04	DUAL INVERTERS
74AUP2G06	DUAL INVERTERS
74AUP2G07	DUAL BUFFERS
74AUP2G08	DUAL AND GATE
74AUP2G125	DUAL 3-STATE BUFFER
74AUP2G126	DUAL 3-STATE BUFFER
74AUP2G14	DUAL SCHMITT TRIGGER INVERTERS
74AUP2G17	DUAL SCHMITT TRIGGER BUFFERS
74AUP2G32	DUAL OR GATE