PLU3 Datasheet | Specifications & PDF Download

IPLU300N04S4-1R1 OptiMOS™-T2 Power-Transistor Features • N-channel - Enhancement mode • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operatin

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® Description PLU3 is an active pull-up buffer piece. Logic Symbol PLU3 PADM 3/8 $0,+*  PLFURQ &026 *DWH $UUD\ Truth Table Pin Loading N/A

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IPLU300N04S4-R8 OptiMOS™-T2 Power-Transistor Features • N-channel - Enhancement mode • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operating

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IPLU300N04S4-R7 OptiMOS™-T2 Power-Transistor Features • N-channel - Enhancement mode • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operating

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HPLR3103, HPLU3103 Data Sheet July 1999 File Number 4501.2 52A, 30V, 0.019 Ohm, N-Channel Logic Level, Power MOSFETs These are N-Channel enhancement

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