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AS7C33128FT36B - (AS7C33128FT32B / AS7C33128FT36B) 3.3V 128K x 32/36 Flow Through Synchronous SRAM

Download the AS7C33128FT36B datasheet PDF (AS7C33128FT32B included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for (as7c33128ft32b / as7c33128ft36b) 3.3v 128k x 32/36 flow through synchronous sram.

Description

The AS7C33128FT32B/36B is a high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) device organized as 131,072 words × 32 or 36 bits.

Fast cycle times of 7.5/8.5/10/12 ns with clock access times (tCD) of 6.5/7.5/8.0/10 ns.

Features

  • Organization: 131,072 words × 32 or 36 bits Fast clock to data access: 6.5/7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow through operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and Global write.
  • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AS7C33128FT32B_AllianceSemiconductorCorporation.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number AS7C33128FT36B
Manufacturer Alliance Semiconductor Corporation
File Size 462.37 KB
Description (AS7C33128FT32B / AS7C33128FT36B) 3.3V 128K x 32/36 Flow Through Synchronous SRAM
Datasheet download datasheet AS7C33128FT36B Datasheet
Other Datasheets by Alliance Semiconductor Corporation

Full PDF Text Transcription

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February 2005 ® AS7C33128FT32B AS7C33128FT36B 3.3V 128K × 32/36 Flow Through Synchronous SRAM Features • • • • • • • Organization: 131,072 words × 32 or 36 bits Fast clock to data access: 6.5/7.5/8.0/10.0 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow through operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and Global write • • • • • • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ Linear or interleaved burst control Snooze mode for reduced power standby Common data inputs and data outputs www.DataSheet4U.
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