AS7C33256NTD18B sram equivalent, 3.3v 256k x 8 pipelined sram.
* Organization: 262,144 words × 18 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.0/3..
requiring random access or Read-Modify-Write operations. NTD™ devices use the memory bus more efficiently by introducing.
Image gallery