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AS7C33256NTD36A - (AS7C33256NTD32A / AS7C33256NTD36A) 3.3V 256K x 2/36 Pipelined burst Synchronous SRAM

Download the AS7C33256NTD36A datasheet PDF (AS7C33256NTD32A included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for (as7c33256ntd32a / as7c33256ntd36a) 3.3v 256k x 2/36 pipelined burst synchronous sram.

Description

The AS7C33256NTD32/36A family is a high performance CMOS 8 Mbit synchronous Static Random Access Memory (SRAM) organized as 262,144 words × 32 or 36 bits and incorporates a LATE LATE Write.

Features

  • Organization: 262,144 words × 32 or 36 bits.
  • NTD™architecture for efficient bus operation.
  • Fast clock speeds to 166 MHz.
  • Fast clock to data access: 3.5/4.0 ns.
  • Fast OE access time: 3.5/4.0 ns.
  • Fully synchronous operation.
  • Common data inputs and data outputs www. DataSheet4U. com.
  • Asynchronous output enable control.
  • Available in 100-pin TQFP.
  • Byte write enables.
  • Clock enable for operation hold.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AS7C33256NTD32A_AllianceSemiconductorCorporation.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number AS7C33256NTD36A
Manufacturer Alliance Semiconductor Corporation
File Size 487.04 KB
Description (AS7C33256NTD32A / AS7C33256NTD36A) 3.3V 256K x 2/36 Pipelined burst Synchronous SRAM
Datasheet download datasheet AS7C33256NTD36A Datasheet
Other Datasheets by Alliance Semiconductor Corporation

Full PDF Text Transcription

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November 2004 ® AS7C33256NTD32A AS7C33256NTD36A 3.3V 256K×32/36 Pipelined burst Synchronous SRAM with NTDTM Features • Organization: 262,144 words × 32 or 36 bits • NTD™architecture for efficient bus operation • Fast clock speeds to 166 MHz • Fast clock to data access: 3.5/4.0 ns • Fast OE access time: 3.5/4.0 ns • Fully synchronous operation • Common data inputs and data outputs www.DataSheet4U.com • Asynchronous output enable control • Available in 100-pin TQFP • Byte write enables • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3 core power supply • 2.5V or 3.
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