ASM4SSTVF32852 Datasheet DDR 24-Bit to 48-Bit Registered Buffer

Manufacturer: Alliance Semiconductor Corporation

ASM4SSTVF32852 ddr 24-bit to 48-bit registered buffer by Alliance Semiconductor Corporation - Datasheet Preview

Datasheet Details

Part number	ASM4SSTVF32852
Manufacturer	Alliance Semiconductor Corporation
File Size	149.39 KB
Description	DDR 24-Bit to 48-Bit Registered Buffer
Download	ASM4SSTVF32852 Download (PDF)

General Description

The 24-Bit to 48-Bit ASM4SSTVF32852 is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O levels except for the LVCMOS RESETB input.

Data flow from D to Q is controlled by the differential clock (CLK/CLKB) and a control signal (RESETB).

The positive edge of CLK is used to trigger the data flow, and CLKB is used to maintain sufficient noise margins, whereas the RESETB, an LVCMOS asynchronous signal is intended for use at the time of power-up only.

Overview

August 2004 rev 2.0 DDR 24-Bit to 48-Bit Registered Buffer ASM4SSTVF32852.

Key Features

Differential clock signals. Supports SSTL_2 class II specifications on inputs and outputs. Low voltage operation.
VDD = 2.3V to 2.7V. To ensure that outputs are at a defined logic state before a stable clock has been supplied, RESETB must be held at a logic “Low” level during power-up. In the DDR DIMM.

More Datasheets from Alliance Semiconductor Corporation

Part Number	Description
ASM4SSTVF16857	DDR 14-Bit Registered Buffer
ASM4SSTVF16859	DDR 13-Bit to 26-Bit Registered Buffer
ASM3P1819N	Low Power Mobile VGA EMI Reduction IC
ASM3P18S19B	Notebook LCD Panel EMI Reduction IC
ASM3P2107A	Peak EMI Reducing Solution
ASM3P2108A	Peak EMI Reducing Solution
ASM3P2109A	Low Power EMI Reduction IC
ASM3P2111A	Peak EMI Reducing Solution
ASM3P2111B	Peak EMI Reducing Solution
ASM3P2180A	Peak Reducing EMI Solution