ASM4SSTVF16857
ASM4SSTVF16857 is DDR 14-Bit Registered Buffer manufactured by Alliance Semiconductor Corporation.
Features
- Fully JEDEC JC40
- JC42.5 pliant for DDR1 applications to include: PC1600, PC2100, PC2700 & PC3200 ( > JEDEC defined DDR 400 @ 200MHz )
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- Low voltage operation; VDD: 2.3V
- 2.7V. not be stable during power-up. To ensure that outputs are at a defined logic state before a stable clock has been supplied, RESETB must be held at a logic low level during power-up. In the JEDEC defined Registered DDR DIMM
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- SSTL_2 Class II outputs. Differential clock inputs. Available in 48 pin TSSOP and TVSOP packages. application, RESETB is specified to be asynchronous with respect to CLK/CLKB; therefore, no timing relationship can be guaranteed between the two
Product Description
The ASM4SSTVF16857 is a universal 14-bit register (D F/F based), designed for 2.3V to 2.7V VDD . The device supports SSTL_2 I/O levels, and is fully pliant with the JEDEC JC40, JC42.5 DDR I specifications covering PC1600, PC2100, PC2700, and PC3200 operational ranges. 14-bit refers to 2Q outputs for each D input
- designed for use in Stacked Registers (stacked memory devices), Buffered DIMM applications. Data flow from D to Q is controlled by the differential clock (CLK/CLKB) along with a controlled reset (RESETB). The positive edge of CLK is used to trigger the data transfer, and CLKB is used to maintain sufficient noise margins, whereas the RESETB input is designed and intended for use at power-up. The ASM4SSTVF16857 supports a low power standby mode of operation. A logic low level at RESETB, assures that all internal registers and outputs (Q) are reset to a logic low state, and that all input receivers, data (D) buffers, and clock (CLK/CLKB) are switched off. Note that RESETB should be supported with a signals. When entering a low-power standby mode, the register will be cleared and the outputs will be driven to a logic low level quickly relative to the time to disable the differential input receivers. This ensures there are no “glitches” on any output. However, when ing out of low...
