* 66 MIPS, 198 MFLOPS Peak, 132 MFLOPS Sustained Performance User-Configurable 544 Kbits On-Chip SRAM Memory Two External Port, DMA Channels and Eight Serial Port, DMA Channels DSP Microcomputer ADSP-21065L SDRAM Controller for Glueless Interface to Low Cost External Memory (@ 66 MHz) 64M Words Exter
ADSP21065L Datasheet (376.80 KB)
ADSP21065L
376.80 KB
Low-cost sharc / 60 mhz / 180 mflops / 3.3v / floating point.
a SUMMARY High Performance Signal Computer for Communications, Audio, Automotive, Instrumentation and Industrial Applications Super Harvard Architectu.
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