PERFORMANCE 30 ns Instruction Cycle Time 33 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Opera.

The ADSP-2185 combines the ADSP-2100 family base architecture (three computational units, data address generators and a.

The ADSP-2185 is a single-chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications. The ADSP-2185 combines the ADSP-2100 family base architecture (three computational units, data address g.

ADSP2181

ADSP2183

ADSP2184

ADSP2186

ADSP2101

ADSP2101BP100

ADSP2104

ADSP21065L

ADSP2109

ADSP21161

ADSP2191M

ADSP2192M

ADSP2195

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