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CYStech Electronics

MTB030N04N3 Datasheet Preview

MTB030N04N3 Datasheet

N-Channel Enhancement Mode Power MOSFET

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CYStech Electronics Corp.
Spec. No. : C884N3
Issued Date : 2014.08.20
Revised Date :
Page No. : 1/ 9
40V N-Channel Enhancement Mode MOSFET
MTB030N04N3
BVDSS
ID @VGS=10V
VGS=10V, ID=7.9A
RDSON(TYP) VGS=4.5V, ID=7.3A
40V
8A
25.3mΩ
34.2mΩ
Features
Low on-resistance
Low voltage gate drive
Excellent thermal and electrical capabilities
Pb-free lead plating and halogen-free package
Equivalent Circuit
MTB030N04N3
Outline
SOT-23
D
GGate
SSource
DDrain
S
G
Ordering Information
Device
MTB030N04N3-0-T1-G
Package
SOT-23
(Pb-free lead plating and halogen-free package)
Shipping
3000 pcs / tape & reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, T1 : 3000 pcs / tape & reel,7reel
Product rank, zero for no rank products
Product name
MTB030N04N3
CYStek Product Specification




CYStech Electronics

MTB030N04N3 Datasheet Preview

MTB030N04N3 Datasheet

N-Channel Enhancement Mode Power MOSFET

No Preview Available !

CYStech Electronics Corp.
Absolute Maximum Ratings (Ta=25C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ VGS=10V, TC=25C
Continuous Drain Current @ VGS=10V, TC=125C
Continuous Drain Current @ VGS=10V, TA=25C (Note 3)
Continuous Drain Current @ VGS=10V, TA=70C (Note 3)
Pulsed Drain Current (Note 1, 2)
TC=25°C
Maximum Power Dissipation
TC=125°C
TA=25°C
TA=70°C
Operating Junction and Storage Temperature
Symbol
VDS
VGS
ID
IDSM
IDM
PD
PDSM
Tj, Tstg
Spec. No. : C884N3
Issued Date : 2014.08.20
Revised Date :
Page No. : 2/ 9
Limits
40
±20
8
4.6
4.7
3.8
32
3
1
1.25
0.8
-55~+175
Unit
V
A
W
C
Thermal Performance
Parameter
Symbol
Limit
Unit
Thermal Resistance, Junction-to-Ambient , max
Thermal Resistance, Junction-to-Case , max
(Note 3)
RθJA
RθJC
100
C/W
50
Note: 1. Pulse width limited by maximum junction temperature.
2. Pulse width300μs, duty cycle2%
3. Surface mounted on 1 in²copper pad of FR-4 board at steady state; 417C/W when mounted on minimum copper
pad.
4. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
5. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value
in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may
be used if the PCB allows it.
Electrical Characteristics (Tj=25C, unless otherwise specified)
Symbol
Min. Typ. Max. Unit
Test Conditions
Static
BVDSS
ΔBVDSS/ΔTj
VGS(th)
40 -
- V VGS=0V, ID=250μA
- 32 - mV/Reference to 25, ID=250μA
1.0 - 2.5 V VDS=VGS, ID=250μA
GFS
- 9.1 -
S VDS=5V, ID=7.9A
IGSS
-
-
±100
nA VGS=±20V, VDS=0V
- -1
VDS=40V, VGS=0V
IDSS - - 50 μA VDS=40V, VGS=0V, Tj=125C
- - 150
VDS=40V, VGS=0V, Tj=175C
- 25.3 34
VGS=10V, ID=7.9A
*RDS(ON)
-
-
-
-
47
65
m
VGS=10V, ID=7.9A, Tj=125C
VGS=10V, ID=7.9A, Tj=175C
- 34.2 46
VGS=4.5V, ID=7.3A
MTB030N04N3
CYStek Product Specification


Part Number MTB030N04N3
Description N-Channel Enhancement Mode Power MOSFET
Maker CYStech Electronics
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