CY2DP814 buffer equivalent, 1:4 clock fanout buffer.
* Low-voltage operation
* VDD = 3.3 V
* 1:4 fanout
* Single input configurable for LVDS, LVPECL, or LVTTL
* Four differential pairs of LVPECL outputs .
the fanout from a single input reduces loading on the input clock. The CY2DP814 is ideal for both level translations fr.
The Cypress CY2 series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DP814 fanout buffer features a single LVDSor a single LVPECL-compatible input and four LVPECL o.
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