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Cypress Semiconductor Electronic Components Datasheet

CY14B104LA Datasheet

4-Mbit (512K x 8/256K x 16) nvSRAM

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CY14B104LA
CY14B104NA
4-Mbit (512K × 8/256K × 16) nvSRAM
4-Mbit (512K × 8/256K × 16) nvSRAM
Features
20 ns, 25 ns, and 45 ns access times
Internally organized as 512K × 8 (CY14B104LA) or 256K × 16
(CY14B104NA)
Packages
44-/54-pin thin small outline package (TSOP) Type II
48-ball fine-pitch ball grid array (FBGA)
Pb-free and restriction of hazardous substances (RoHS)
compliant
Hands off automatic STORE on power-down with only a small
capacitor
Functional Description
STORE to QuantumTrap non-volatile elements initiated by
software, device pin, or AutoStore on power-down
RECALL to SRAM initiated by software or power-up
Infinite read, write, and recall cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Single 3 V +20, –10operation
Industrial temperature
The Cypress CY14B104LA/CY14B104NA is a fast static RAM
(SRAM), with a non-volatile element in each memory cell. The
memory is organized as 512K bytes of 8 bits each or 256K words
of 16-bits each. The embedded non-volatile elements incor-
porate QuantumTrap technology, producing the world’s most
reliable non-volatile memory. The SRAM provides infinite read
and write cycles, while independent non-volatile data resides in
the highly reliable QuantumTrap cell. Data transfers from the
SRAM to the non-volatile elements (the STORE operation) takes
place automatically at power-down. On power-up, data is
restored to the SRAM (the RECALL operation) from the
non-volatile memory. Both the STORE and RECALL operations
are also available under software control.
For a complete list of related documentation, click here.
Logic Block Diagram [1, 2, 3]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A17
A18
R
O
W
D
E
C
O
D
E
R
Quatrum Trap
2048 X 2048
STORE
RECALL
STATIC RAM
ARRAY
2048 X 2048
VCC
VCAP
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
HSB
A14 - A2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A9 A10 A11 A12 A13 A14 A15 A16
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A18 for × 8 configuration and Address A0–A17 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-49918 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 12, 2017


Cypress Semiconductor Electronic Components Datasheet

CY14B104LA Datasheet

4-Mbit (512K x 8/256K x 16) nvSRAM

No Preview Available !

CY14B104LA
CY14B104NA
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 5
Device Operation .............................................................. 6
SRAM Read ................................................................ 6
SRAM Write ................................................................. 6
AutoStore Operation .................................................... 6
Hardware STORE Operation ....................................... 6
Hardware RECALL (Power-Up) .................................. 7
Software STORE ......................................................... 7
Software RECALL ....................................................... 7
Preventing AutoStore .................................................. 8
Data Protection ............................................................ 8
Maximum Ratings ............................................................. 9
Operating Range ............................................................... 9
DC Electrical Characteristics .......................................... 9
Data Retention and Endurance ..................................... 10
Capacitance .................................................................... 10
Thermal Resistance ........................................................ 10
AC Test Loads ................................................................ 11
AC Test Conditions ........................................................ 11
AC Switching Characteristics ....................................... 12
Switching Waveforms .................................................... 13
AutoStore/Power-Up RECALL ....................................... 16
Switching Waveforms
– AutoStore/Power-up RECALL .................................... 16
Software Controlled STORE/RECALL Cycle ................ 17
Switching Waveforms
– Software Controlled STORE/RECALL Cycle ............. 17
Hardware STORE Cycle ................................................. 18
Switching Waveforms – Hardware STORE Cycle ........ 18
Truth Table For SRAM Operations ................................ 19
Ordering Information ...................................................... 20
Ordering Code Definitions ......................................... 21
Package Diagrams .......................................................... 22
Acronyms ........................................................................ 25
Document Conventions ................................................. 25
Units of Measure ....................................................... 25
Document History Page ................................................. 26
Sales, Solutions, and Legal Information ...................... 28
Worldwide Sales and Design Support ....................... 28
Products .................................................................... 28
PSoC® Solutions ...................................................... 28
Cypress Developer Community ................................. 28
Technical Support ..................................................... 28
Document Number: 001-49918 Rev. *O
Page 2 of 28


Part Number CY14B104LA
Description 4-Mbit (512K x 8/256K x 16) nvSRAM
Maker Cypress Semiconductor
Total Page 28 Pages
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