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CY14B104M - 4-Mbit (512 K x 8/256 K x 16) nvSRAM

This page provides the datasheet information for the CY14B104M, a member of the CY14B104K 4-Mbit (512 K x 8/256 K x 16) nvSRAM family.

Datasheet Summary

Features

  • 25 ns and 45 ns access times.
  • Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M).
  • Hands off automatic STORE on power-down with only a small capacitor.
  • STORE to QuantumTrap nonvolatile elements is initiated by software, device pin, or AutoStore on power-down.
  • RECALL to SRAM is initiated by software or power-up.
  • High reliability.
  • Infinite read, write, and RECALL cycles.
  • 1 million STORE cycles to QuantumTrap.
  • 20 year data retention.

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Datasheet preview – CY14B104M

Datasheet Details

Part number CY14B104M
Manufacturer Cypress Semiconductor
File Size 700.53 KB
Description 4-Mbit (512 K x 8/256 K x 16) nvSRAM
Datasheet download datasheet CY14B104M Datasheet
Additional preview pages of the CY14B104M datasheet.
Other Datasheets by Cypress Semiconductor

Full PDF Text Transcription

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CY14B104K/CY14B104M 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features ■ 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M) ■ Hands off automatic STORE on power-down with only a small capacitor ■ STORE to QuantumTrap nonvolatile elements is initiated by software, device pin, or AutoStore on power-down ■ RECALL to SRAM is initiated by software or power-up ■ High reliability ■ Infinite read, write, and RECALL cycles ■ 1 million STORE cycles to QuantumTrap ■ 20 year data retention ■ Single 3 V +20%, –10% operation ■ Data integrity of Cypress nvSRAM combined with full-featured real time clock (RTC) Logic Block A0 A1 A2 A3 A4 A5 A6 A7 A8 A17 A18 DQ0 DQ1 DQ2 DQ3 DQ4 DQ
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