Datasheet4U Logo Datasheet4U.com

CY24272 - Rambus XDR Clock Generator

General Description

For a complete list of related documentation, click here.

Key Features

  • Meets Rambus® Extended Data Rate (XDR™) clocking requirements.
  • 25 ps typical cycle-to-cycle jitter.
  • 135 dBc/Hz typical phase noise at 20 MHz offset.
  • 100 or 133 MHz differential clock input.
  • 300.
  • 667 MHz high speed clock support.
  • Quad (open drain) differential output drivers.
  • Supports frequency multipliers: 3, 4, 5, 6, 9/2 and 15/4.
  • Spread Aware™.
  • 2.5 V operation.
  • 28-pin TSSOP package Device Comparison CY24271 SDA hold time = 300.

📥 Download Datasheet

Full PDF Text Transcription for CY24272 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CY24272. For precise diagrams, and layout, please refer to the original PDF.

CY24272 Rambus® XDR™ Clock Generator with Zero SDA Hold Time Rambus® XDR™ Clock Generator with Zero SDA Hold Time Features ■ Meets Rambus® Extended Data Rate (XDR™) clock...

View more extracted text
SDA Hold Time Features ■ Meets Rambus® Extended Data Rate (XDR™) clocking requirements ■ 25 ps typical cycle-to-cycle jitter ❐ –135 dBc/Hz typical phase noise at 20 MHz offset ■ 100 or 133 MHz differential clock input ■ 300–667 MHz high speed clock support ■ Quad (open drain) differential output drivers ■ Supports frequency multipliers: 3, 4, 5, 6, 9/2 and 15/4 ■ Spread Aware™ ■ 2.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY24271 Clock Generator
CY24212 MediaClock MPEG Clock Generator
CY24239 Spread Spectrum Frequency Timing Generator
CY24292 Four Outputs PCI-Express Clock Generator
CY2410 MPEG Clock Generator
CY24119 MediaClock 27-MHz VCXO Clock Generator
CY24130 HOTLink II SMPTE Receiver Training Clock
CY24133 MediaClock Digital TV Clock Generator
CY24141-3 MediaClock Graphics Clock Generator
CY24142 MediaClock Multimedia Clock Generator