CY7C1212F Datasheet - Cypress Semiconductor

1-Mbit (64K x 18) Pipelined Sync SRAM

CY7C1212F Features

* Registered inputs and outputs for pipelined operation

* 64K × 18 common I/O architecture

* 3.3V core power supply

* 3.3V I/O operation

* Fast clock-to-output times

* 3.5 ns (for 166-MHz device)

* 4.0 ns (for 133-MHz device)

* Provide

CY7C1212F General Description

1] The CY7C1212F SRAM integrates 65,536 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addre.

CY7C1212F Datasheet (359.67 KB)

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CY7C1212F

Manufacturer:

Cypress Semiconductor

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359.67 KB

Description:

1-mbit (64k x 18) pipelined sync sram.

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CY7C1212F 1-Mbit 64K Pipelined Sync SRAM Cypress Semiconductor

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CY7C1212F Features

CY7C1212F General Description

Datasheet Details

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