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CY7C1347G Datasheet - Cypress Semiconductor

4-Mbit (128K x 36) Pipelined Sync SRAM

CY7C1347G Features

* Fully registered inputs and outputs for pipelined operation

* 128K by 36 common I/O architecture

* 3.3V core power supply

* 2.5V/3.3V I/O operation

* Fast clock-to-output times

* 2.6 ns (for 250-MHz device)

* 2.6 ns (for 225-MHz device)

CY7C1347G General Description

1] The CY7C1347G is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V. All synchronous inputs pass through inp.

CY7C1347G Datasheet (527.03 KB)

Preview of CY7C1347G PDF

Datasheet Details

Part number:

CY7C1347G

Manufacturer:

Cypress Semiconductor

File Size:

527.03 KB

Description:

4-mbit (128k x 36) pipelined sync sram.

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CY7C1347G 4-Mbit 128K Pipelined Sync SRAM Cypress Semiconductor

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