PSoC4500S Datasheet | Cypress

Description PSo C® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU. It bines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSo C 4500S is a member of the PSo C 4 platform architecture. It is a bination of a microcontroller with standard munication and timing peripherals, a capacitive touch-sensing system (Cap Sense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSo C 4500S products will be upward patible with members of the PSo C 4 platform for new applications and design needs. Features 32-bit MCU Subsystem - 48-MHz Arm Cortex-M0+ CPU with single-cycle multiply - Up to 256 KB of flash with Read Accelerator - Up to 32 KB of SRAM - 8-channel DMA engine - Two Divide and Square Root putation accelerators Programmable Analog - Four opamps with reconfigurable high-drive external and high-bandwidth internal drive and parator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. - Two 12-bit 1-Msps SAR ADCs with differential and single-ended modes, and Channel Sequencer with signal averaging. Simultaneous sampling is provided. - Single-slope 10-bit ADC function provided by a capacitance sensing block - Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin - Two low-power parators that operate in Deep Sleep low-power mode Programmable Digital - Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs Low-Power 1.71-V to 5.5-V Operation - Deep Sleep mode with operational analog and 2.5-µA digital system current Capacitive Sensing - Cypress Cap Sense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance - Cypress-supplied software ponent makes capacitive sensing design easy - Automatic...