PSoC4500S Key Features
- 48-MHz Arm Cortex-M0+ CPU with single-cycle multiply
- Up to 256 KB of flash with Read Accelerator
- Up to 32 KB of SRAM
- 8-channel DMA engine
- Two Divide and Square Root putation accelerators
- Four opamps with reconfigurable high-drive external and
- Two 12-bit 1-Msps SAR ADCs with differential and single-ended modes, and Channel Sequencer with signal averaging. Simult
- Single-slope 10-bit ADC function provided by a capacitance sensing block
- Two current DACs (IDACs) for general-purpose or capacitive sensing