74AUP1G125 Datasheet SINGLE BUFFER GATE

Manufacturer: Diodes Incorporated

Datasheet Details

The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

Pin Assignments The 74AUP1G125 is a single, non-inverting buffer/bus driver, designed for operation over a power supply range of 0.8V to 3.6V.

The device has a three-state output that enters a high-impedance state when a high level is applied to the output enable (OE) pin.

74AUP1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT.

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8V to 3.6V.
±4mA Output Drive at 3.0V.
Low Static Power Consumption ICC < 0.9µA.
Low Dynamic Power Consumption CPD = 6.3pF (Typical at 3.6V).
Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.
ESD Protection Excee.

Part Number	Description	Manufacturer
74AUP1G125	Low-power buffer/line driver	NXP Semiconductors
74AUP1G125	Low-power buffer/line driver	nexperia
74AUP1G125-Q100	Low-power buffer/line driver	nexperia

Part Number	Description
74AUP1G126	SINGLE BUFFER GATE
74AUP1G14	SINGLE SCHMITT-TRIGGER INVERTER
74AUP1G17	SINGLE SCHMITT-TRIGGER BUFFER
74AUP1G00	SINGLE 2 INPUT POSITIVE NAND GATE
74AUP1G02	SINGLE 2 INPUT POSITIVE NOR GATE
74AUP1G04	SINGLE INVERTER GATE
74AUP1G06	SINGLE INVERTER
74AUP1G07	SINGLE BUFFER/DRIVER
74AUP1G08	SINGLE 2 INPUT POSITIVE AND GATE
74AUP1G09	SINGLE 2 INPUT POSITIVE AND GATE