Description
The EDS2532AABH is a 256M bits SDRAM organized as 2,097,152 words × 32 bits × 4 banks.
Features
- B
DQ28 VDDQ VSSQ
3.3V power supply Clock frequency: 100MHz (max. ) Single pulsed /RAS ×32 organization 4 banks can operate simultaneously and independently.
- Burst read/write operation and burst read/single write operation capability.
- Programmable burst length (BL): 1, 2, 4, 8 and full page.
- 2 variations of burst sequence ⎯ Sequential (BL = 1, 2, 4, 8, full page) ⎯ Interleave (BL = 1, 2, 4, 8).
- Programmable /CA.