74LS240
Description
These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 m V of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133Ω.
Features s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current)
24 m A s Typical IOH (source current)
- 15 m A s Typical propagation delay times
Inverting
10.5 ns
Noninverting 12 ns s Typical enable/disable time 18 ns s Typical power dissipation (enabled)
Inverting
130 m W
Noninverting 135 m W
Ordering Code:
Order Number Package Number
Package Description
DM74LS240WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS240S...
