Datasheet Summary
- Quad Buffer with 3-STATE Outputs
74VHC125 Quad Buffer with 3-STATE Outputs
December 2007
Features
- High Speed: tPD = 3.8ns (Typ.) at VCC = 5V
- Lower power dissipation: ICC = 4 µA (Max.) at
TA = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (Min.)
- Power down protection is provided on all inputs
- Low noise: VOLP = 0.8V (Max.)
- Pin and function patible with 74HC125
General Description
The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced highspeed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power...
