Download 74VHC125 Datasheet PDF
Fairchild Semiconductor
74VHC125
Features - High Speed: t PD = 3.8ns (Typ.) at VCC = 5V - Lower power dissipation: ICC = 4 µA (Max.) at TA = 25°C - High noise immunity: VNIH = VNIL = 28% VCC (Min.) - Power down protection is provided on all inputs - Low noise: VOLP = 0.8V (Max.) - Pin and function patible with 74HC125 General Description The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced highspeed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Order Number 74VHC125M 74VHC125SJ 74VHC125MTC Package...