74VHC126 Datasheet (nexperia) - Quad buffer/line driver

74VHC126, Quad buffer/line driver

The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7-A.

The 74VHC126; 74VHCT126 provide four non-inverting buffer/line drivers with 3-state outputs.

The 3-state outputs (nY)

74VHC126 Features

* Balanced propagation delays

* All inputs have Schmitt-trigger action

* Inputs accept voltages higher than VCC

* Input levels:

* The 74VHC126 operates with CMOS input level

* The 74VHCT126 operates with TTL input level

* ESD protection: