s DM74LS174 contains six flip-flops with single-rail outputs s DM74LS175 contains four flip-flops with double-rail outputs s Buffered clock and direct clear inputs s Indi.

include: Buffer/storage registers Shift registers Pattern generators s Typical clock frequency 40 MHz s Typical power di.

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad (175) versions feature complementary outputs from each flip-flop. Information at the D inputs meeting the .

DM74LS173A

DM74LS175

DM74LS10

DM74LS107A

DM74LS109A

DM74LS11

DM74LS112A

DM74LS123

DM74LS125A

DM74LS126A

DM74LS132

DM74LS136

DM74LS138