DM74LS174 Datasheet, Flip-flops, National Semiconductor

DM74LS174 Features

• Flip-flops Y Y Y Y Y Y Y Y LS174 contains six flip-flops with single-rail outputs LS175 contains four flip-flops with double-rail outputs Buffered clock and direct clear inputs Individual data i

PDF File Details

Part number:

DM74LS174

Manufacturer:

National Semiconductor

File Size:

189.84kb

Download:

📄 Datasheet

Description:

Hex/quad d flip-flops. These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and

DM74LS174 Application

• Applications include Buffer storage registers Shift registers Pattern generators Typical clock frequency 40 MHz Typical power dissipation per flip-f

TAGS

DM74LS174

National Semiconductor

📁 Related Datasheet

DM74LS173A - 4-Bit D-Type Register (National Semiconductor)
54LS173 DM74LS173A TRI-STATE 4-Bit D-Type Register May 1992 54LS173 DM74LS173A TRI-STATE 4-Bit D-Type Register General Description This four-bit re.

DM74LS174 - Hex/Quad D-Type Flip-Flops (Fairchild Semiconductor)
DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Clear August 1992 Revised April 2000 DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Cle.

DM74LS175 - Hex/Quad D Flip-Flops (National Semiconductor)
54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex Quad D Flip-Flops with Clear June 1989 54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM7.

DM74LS175 - Hex/Quad D-Type Flip-Flops (Fairchild Semiconductor)
DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Clear August 1992 Revised April 2000 DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Cle.

DM74LS10 - Triple 3-Input NAND Gate (Fairchild Semiconductor)
DM74LS10 Triple 3-Input NAND Gate August 1986 Revised March 2000 DM74LS10 Triple 3-Input NAND Gate General Description This device contains three in.

DM74LS10 - Triple 3-Input NAND Gates (National Semiconductor)
54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates June 1989 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description This device cont.

DM74LS107A - Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops (National Semiconductor)
DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs June 1989 DM54LS107A DM74LS107A .

DM74LS109A - Dual Positive-Edge-Triggered J-K Flip-Flop (Fairchild Semiconductor)
DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs June 1986 Revised March 2000 DM74LS109A Dual Pos.

DM74LS109A - Dual Positive-Edge-Triggered J-K Flip-Flops (National Semiconductor)
54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS109 DM54LS109A D.

DM74LS11 - Triple 3-Input AND Gate (Fairchild Semiconductor)
DM74LS11 Triple 3-Input AND Gate August 1986 Revised March 2000 DM74LS11 Triple 3-Input AND Gate General Description This device contains three inde.